L-3.6: Direct Mapping with Example in Hindi | Cache Mapping | Computer Organisation and Architecture

L-3.6: Direct Mapping with Example in Hindi | Cache Mapping | Computer Organisation and Architecture

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Master_Demo007
Master_Demo007 - 16.11.2023 15:24

Kya tag number koi bhi 3 bit random number liya Jaa sakta h

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Master_Demo007
Master_Demo007 - 16.11.2023 15:23

Tag number 010 ya 001 hi kyun h?

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Souryya Pharas
Souryya Pharas - 13.11.2023 07:48

0 mod 4= 4 to...why 0???

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bugi bugi shah shah
bugi bugi shah shah - 04.10.2023 07:11

400 comment krne kai liye krra hu

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Rupinder Kaur
Rupinder Kaur - 19.09.2023 04:03

Thank you sir...well explained in short time

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Parveen Kumari
Parveen Kumari - 11.09.2023 15:11

Superb sir ji

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Mr A Kumar
Mr A Kumar - 22.08.2023 06:53

Where can i find notes for this whole lectures?

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rafay asif
rafay asif - 05.07.2023 23:02

Bht bht bht shukriyaa vip❤

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Pranjal Deb
Pranjal Deb - 01.07.2023 13:23

if main memory has 128 words then the number of each bits in a specific word should be 7 bits right ? as per your earlier videos!! then how 32 blocks has come up and why have you divided by 4

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ankit saxena
ankit saxena - 24.06.2023 16:57

Kuch samjh nhi aaya 😂😂😂😂😂 nind ane lg gyi

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prince Kumar
prince Kumar - 21.06.2023 02:46

Note:

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usman gill
usman gill - 16.06.2023 04:04

zero ❌
gero ✅

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Ungabunga
Ungabunga - 22.05.2023 19:27

Great Explanation.

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Neha Yadav
Neha Yadav - 20.05.2023 15:56

Thanku sir....very well explained ❣️

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Himanshu Rana
Himanshu Rana - 19.05.2023 18:39

Consider a main memory of the size 64 kB with each word being of 8 bits (one byte) only and a direct mapping Cache memory of size 4 kB also having data word size of
8 bits. Find the following :
(i) What is the size of tag and index fields of cache ?
(ii) In what location of Cache, hexadecimal address to main memory (AABB) (if exists in cache) will be located ?


will anyone tell me how to solve it ??

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Suyog Sadawarti
Suyog Sadawarti - 14.05.2023 10:07

Very well explained sir. Thank you

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Shantanu Sharma
Shantanu Sharma - 07.05.2023 10:16

sir 4 divide by 4 how zero

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Tanish Neema
Tanish Neema - 05.05.2023 10:02

Got the complete knowledge in single video. You covered every aspect of Direct Cache Memory Mapping. Excellent work done Sir.

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Dashing Vinit
Dashing Vinit - 18.04.2023 22:41

Aap teacher toh badhiya ho .. mere college exams ka padhai ek rat mai pura ho jata hai apki video sse

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Gautam Goswami
Gautam Goswami - 07.04.2023 20:06

Sir ek question tha 10th no ka word hai means W9 hona chahiye na kyoki numbering to 0 se start hai
Means W9 word 10th no ka word hoga

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Prateek Biswas
Prateek Biswas - 30.03.2023 18:44

thank u sirrrrrrrrr...........................u r a lifesaver

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Short Clips
Short Clips - 24.03.2023 07:06

Bhai video ke sath sath jese video main bataya gya hai uska notes bana dete to acha hota. Kyuki video dekh ke notes banane main bht time lag jata hai..

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GymGlowGuidance
GymGlowGuidance - 23.03.2023 08:44

Master hai Master😎💖

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Aditya Kumar
Aditya Kumar - 19.03.2023 21:44

People have fan of different actors, sports man as Hero you are my😊

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Megha Lalwani
Megha Lalwani - 13.03.2023 19:11

Amazing teaching skills

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Akash prajapati
Akash prajapati - 07.03.2023 06:56

k % n is the formula of linear probing collision removing techniques in hashing

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Shaik Huzma
Shaik Huzma - 05.03.2023 05:08

Bhayya notes send karo pls tmr exam hai

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Adarsh Mishra
Adarsh Mishra - 16.02.2023 16:54

Very good lecture sir, charn sprsh🙏

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Jaideep
Jaideep - 15.02.2023 21:53

such a super explanation just loved the video and the explanation thank you sir!!

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Yuvraj Singh
Yuvraj Singh - 14.02.2023 21:59

thank you sir

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Bishal
Bishal - 08.02.2023 07:15

bhai pass karade kal exam hae .

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call me SP
call me SP - 06.02.2023 20:09

thank you sir

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Vasu
Vasu - 03.02.2023 16:28

Hats off sir !

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Abhishek Meena
Abhishek Meena - 30.01.2023 21:10

Amazing vedios... Thanx sir!!

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Abha
Abha - 23.01.2023 05:36

Is word size is always 4 or given in the question please reply I want to clear my doubt sir

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Saritha Shetty
Saritha Shetty - 14.01.2023 09:05

Assume that a processor has 24-bit address bus and 8-bit data bus. Design a
computer system that interfaces this processor with RAM of size 512 KB made
of 64 KB chips and 64 KB of single chip ROM with address map starting at
locations 400000 and 000000 respectively. Draw a neat sketch of the schematic
diagram showing the interconnections and the address decoder. how to design this?

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JOY JAIN
JOY JAIN - 12.12.2022 14:59

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The Resilient Pianist
The Resilient Pianist - 08.12.2022 10:37

🙏🙏🙌🙌❤❤

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Saurav
Saurav - 07.12.2022 14:41

Dbms me indexing wala concept bhinto aisa hi tha kuch, just wha pe harddisk me hi indexing kr dete the, aur yha ram se chache me, correct me if m wrong????

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Raghu Sharma
Raghu Sharma - 06.12.2022 15:39

Can anyone provide me notes of the cache mapping ( all three types)?

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Vaibhavi Kulkarni
Vaibhavi Kulkarni - 25.11.2022 06:12

First time I understood What exactly is Block offset thanks😅

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Aman Jaiswal
Aman Jaiswal - 17.11.2022 18:58

Your are literally 10times Better than my teacher

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Nicole Falcao
Nicole Falcao - 16.11.2022 07:04

Excellent Explanation Sir!Thank you soo much!!!

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VILLAGE STUDIO
VILLAGE STUDIO - 28.10.2022 10:00

1 word is 2 bytes.rt?

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dhoni _07
dhoni _07 - 21.10.2022 14:13

Mai pura sal college nahi gaya family problems se job karni patditi hai lekin mai apki video dekh ke hi bca passed ho gaya

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Ubaid Ubaid
Ubaid Ubaid - 05.10.2022 18:51

Last ma 2^2=16 + 3bits of tag which is equal to 19 (0-19)= 20word aysa hi ha?

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fun
fun - 15.09.2022 19:13

appreciated.😊

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Kimaya Patil
Kimaya Patil - 10.09.2022 15:20

Thank you sir , aapki playlist se privious ban rahe hai

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