How to use vivado for Beginners | Verilog code | Testbench | Schematic View

thank you all for love❤ ,keep supporting and keep liking & subscribing🙏.

does #10 mean wait for 10ns??

Thanks for the easy to follow tutorial!

how to change font size in vivado text editor

Thank you for this :)

So nice thanks crystal clear illustrations thanks

لو سمحت كلمة reg تظهر كلمة عادية وليست ملونة بالاحمر او الأزرق ؟!

Nice video ! this helped me a lot

Sirrrr....I want link to download it....can u plss give...tommorow is my practical exam

Thanks

Which edition of vivado is used ??

great video covering all basics

Sir one verilog code for register.

Sir is it applicable to 2022 version??
Please 🙏 reply

When I press schematic it opens a package window and a Device window and not a schematic window what do I do ?

how can I change the font size here???

While runing simulation in test bench I will get as invalid top module wt shld i do

Sir If we want to display something in xilinix using verilog code ( like just writing hello world ) where can we see the display output in xilinix

While adding source vivado stucking no matter what the time taking, how to add source pls give a solution

thank you so much, I have a one question what is the purpose of clock ?

Critical error message during simulation