WRITING VERILOG TEST BENCHES

Well explained. Thank you ;)

This was too much to engulf

which lecture contains syntax and basics of writing a verilog test bench

Good morning sir.
How to write a self checking test bench for arithmetic operators

Well explained. Thank u sir :)

In the last test bench of adder circuit what is the effect of myseed=15 ? Means what will be the effect of value 15 here?

at 20.34 , clr =1 is applied after 7 (2+5), not at the edge of clk